PowerDRC/LVS 2.0.1 released
Kiev, Ukraine, November 14 2014

POLYTEDA UKRAINE LLC, a provider of semiconductor design software and PV-services, today announced the general availability of PowerDRC/LVS version 2.0.1.
This release is dedicated to delivering new LVS functionality and further significant improvements for multi-CPU mode:

  • Added soft_check capability that allows to report upper layer polygons that get conflicting connectivity

  • Added support of with_text command for hierarchical mode of LVS.

  • XOR capability improvements:

    • Added support of multi-CPU to dramatically improve XOR performance

    • XOR mode became a separately licensed feature

    • Improved handling of critical situations

    • Added support of OA and CDBA formats when XOR is started from PowerRDE application

  • Improved readability of PowerDRC/LVS logs and summary

  • Discontinued support of Linux 4 by PowerDRC/LVS

PowerDRC/LVS is designed to process integrated circuit (IC) designs of various size at technology nodes up to 40nm, with run times which are fast and completely predictable. It is massively scalable and provides turnaround is time that is up to an order of magnitude faster than existing solutions. PowerDRC/LVS achieves this scalability and turnaround time through the use of a unique data structure and tive window scanning technique.

Production Quality

During beta test period, POLYTEDA worked with wide list of partners and evaluators in Europe and US to validate accuracy and performance for production.

Foundry Support

Contact us to learn more about the availability of foundry rule decks.


The release version is officially available from POLYTEDA. Contact sales@polyteda.com for more details. If you are interested in getting a copy of


POLYTEDA UKRAINE LLC is a rapidly growing design automation company focused on providing fast, accurate and affordable verification solutions for electronic design companies. For more information about POLYTEDA and its products, please visit www.polyteda.com.